mux (1) 썸네일형 리스트형 MUX(멀티플렉서) - VHDL AMUX--------------------------------------------------------------------------------- Library IEEE; use IEEE.std_logic_1164.all; use IEEE.std_logic_arith.all; use IEEE.std_logic_unsigned.all; Entity AMUX is port(IR_out : in std_logic_vector(7 downto 0); PC_out : in std_logic_vector(7 downto 0); Asel : in std_logic; addr : out std_logic_vector(7 downto 0)); end AMUX; architecture BEHAV of AMUX is.. 이전 1 다음